Domain Wall Logic (Spintronics) using CMOS compatible production processes
Scientists from Paul Scherrer Institute (PSI) and ETH Zurich have taken a big step towards making Spintronic devices manufacturable based on processes used in CMOS microchip production. So called Domain Wall Logic circuits can store many different non-volatile magnetic states (bits) directly within the circuit. Such a logic-in-memory device would restart in the exact state it had before a power loss and could immediately continue whatever process was underway at the time of the power loss. This is highly desirable if the power source is unreliable or turned off to save energy as happens in many IoT applications.
The team led by Professors Gambardella and Heyderman demonstrated a working proof of concept Domain Wall Logic Adder that fundamentally merges storage and processing operations in a single circuit. This opens the door to further boosting the computational capacity of our computers in the future.
The team around Zhaochu Luo, Ales Hrabec, Pietro Gambardella and Laura Heyderman are working on using electron spin states to store information within very small magnetized areas. In 2019 they demonstrated a “lateral chiral coupling” effect in certain materials. They showed that toggling one domain would automatically flip the adjacent magnetic domains magnetic field, Luo et al., Science 363, 1435–1439 (2019)
Zhaochu Luo then took a bold step forward by transferring the effect onto moving magnetized domains. It is possible to shift magnetic domain walls along a nanowire using an electric current; this opens the possibility of high-density and non-volatile data storage devices. However, using information stored in magnetic domain walls for logic operations is impractical at best with current technology.
The group have since demonstrated that if the magnetic domains move across special areas where the “lateral chiral coupling” takes place, the magnetic fields were inverted. This all-electric domain wall equivalent of a standard logic NOT gate showed that operations performed directly on stored bits are possible using this technology and that this is potentially scalable based on standard CMOS production processes.
Zhaochu Luo and Ales Hrabec continued from there and constructed a NAND gate, one of the basic building blocks of any logic circuit. They were thrilled to see it work on the very first attempt. After that, they continued to build a functional full adder made of 15 NAND gates. The realization of the NAND gates and the adder demonstrates that these circuits are functionally complete and that gates can be cascaded, which is a main requisite in building all electronic logic devices. The finding are being patented and are published in Nature Magazine: Luo, Z., Hrabec, A., Dao, T.P. et al. Current-driven magnetic domain-wall logic. Nature 579, 214–218 (2020).