SiC: Power devices, Interfaces and their Characterization

Fig. 1. Simultaneously acquired topographic image (a) while KPFM (b) and 2ω EFM (c) measurements were performed by the oscillation of the second eigenmode. To avoid rounding effects at the sample edges two samples were glued together with non-conductive epoxy.
Fig. 1. Simultaneously acquired topographic image (a) while KPFM (b) and 2ω EFM (c) measurements were performed by the oscillation of the second eigenmode. To avoid rounding effects at the sample edges two samples were glued together with non-conductive epoxy.
For power semiconductor devices the two main figures of merit are (i) a high blocking voltage capability, which minimizes the reverse current in the OFF-state and (ii) a low ON-state resistance when the device is operated under forward conditions. The material properties of silicon carbide are expected to be superior to silicon because of their higher critical electric field and higher thermal conductivity. This properties can be integrated into devices like Schottky diodes, MOS capacitors and planar MOSFETs. Thereby higher switching speeds can be achieved at lower power dissipation. A significant challenge and current limitation in performances of active devices is due to the low channel mobilities inside the inversion channel at the 4H-SiC/insulator interface and the increasing junction-FET resistance causing the downscaling of these devices. Various interface passivation treatments therefore have been tested which resulted in a slight mobility improvement of current devices. However the obtained mobilities are still far below the theoretical bulk value and the physical origin of the mobility enhancing mechanism still remains unclear.

Current research activities:
  • Wide Band Gap Power Semiconductors Improved by Nanoscale Probe Analytics
  • Physical Studies of SiC Nano-Trench-MOSFETs [1]
  • Atomic-Scale Analysis of SiC-Oxide Interface for Improved High-Power MOSFETs
[1] Device Simulations on Novel High Channel Mobility 4H-SiC Trench MOSFETs and Their Fabrication Processes
H. R. Rossmann, A. Bubendorf, F. Zanella, N. Marjanović, et al.
Microelectron. Eng. 145, 166 (2015)
Prof. Thomas Jung

Laboratory for Micro-
and Nanotechnology
Paul Scherrer Institut
5232 Villigen PSI
Switzerland

Telephone:
+41 56 310 4518
Telefax:
+41 56 310 2646
E-mail:
thomas.jung@psi.ch