Dr. Roberto Dinapoli

Microelectronics Engineer, leader of the chip design group

Paul Scherrer Institut
Forschungsstrasse 111
5232 Villigen PSI

Roberto Dinapoli started his career in the field of microelectronics for high energy physics. Already during his Master thesis he worked on the design of the readout chip for the silicon drift detector of the CERES/NA45 CERN experiment. This work was done in a collaboration between his university "Politecnico di Bari", in Italy, and the Max-Plank Institut in Heidelberg. He then moved to CERN where he worked both as external associate (being affiliated to the "Istituto di fisica nucleare di Bari", Italy) and as PhD student of the "Université Montpellier II", France. His main project was the design of a radiation tolerant pixel detector system for the ALICE and LHCb experiments. The detector he contributed to design was successfully installed and operated at the LHC. He then joined the TOTEM CERN experiment, where he collaborated with the setup and development of the readout electronics of the TOTEM particle detector.
In 2004 he moved to PSI where he is involved in the development of microelectronics for research, in particular hybrid detectors for X-ray (synchrotron and FEL) radiation.

Roberto Dinapoli is at PSI since 2004 and at present leader of the chip design inter-department group (CDCT). In the field of chip design his main responsibilities are: technical advice and support in all aspects of chip design, setup and testing of new technologies, development of building blocks, definition, coordination and realization of full chip design projects, chip testing and characterization. In the field of CAD-system management he is responsible for the purchase, installation, licensing and maintenance of all the chip design CAD software, in particular the CADENCE design suite, does user support for chip design CAD software and is PSI representative for EUROPRACTICE and FARADAY. He also manages the procedures to gain access to new technologies or intellectual properties.

Dinapoli is also active, in collaboration with PSI Technology Transfer, in the field of patent writing and filing as well as in the process of licensing PSI research developments to external companies, in particular DECTRIS. The corresponding license fees are a substantial source of funding for PSI.

Dinapoli’s scientific research is focused on the applications of microelectronics to physics, in particular x-ray detection for photon science.  EIGER is a hybrid photon counting, mixed-mode pixel chip for X-ray radiation detection with radiation-hard design (Hardeningn by Desig, HBD) and 24 kHz framing rate. MOENCH is a hybrid, charge integration, mixed-mode pixel chip for X-ray radiation detection with 25x25 μm2 pixel size and μm resolution in interpolation mode. MYTHEN III is a photon counting, mixed-mode strip chip for X-ray radiation detection with 50um strips and multiple comparators. DOMINO is a switched capacitors analogue memory with 2GHz input bandwidth, 10Gs/s sampling rate and 50 MHz readout clock, 8 channels x 4096 samples/channel. He has also collaborated with the development of the charge integrating chips JUNGFRAU (at present in use at the SwissFel) and AGIPD (at present in use at the European Free Electron Laser). More details about past and present projects can be found here.

For an extensive overview we kindly refer you to our publication repository DORA (link is external), or to my Research Gate personal page.

High-resolution non-destructive three-dimensional imaging of integrated circuits, Mirko Holler, Manuel Guizar-Sicairos, Esther H. R. Tsai, Roberto Dinapoli, Elisabeth Müller, Oliver Bunk, Jörg Raabe & Gabriel Aeppli, Nature 543, 402–406, 16 March 2017, doi:10.1038/nature21698  

Modern nanoelectronics has advanced to a point at which it is impossible to image entire devices and their interconnections non-destructively because of their small feature sizes and the complex three-dimensional structures resulting from their integration on a chip. Here we demonstrate that X-ray ptychography—a high-resolution coherent diffractive imaging technique—can create three-dimensional images of integrated circuits of known and unknown designs with a lateral resolution in all directions down to 14.6 nanometres. Our experiments represent a major advance in chip inspection and reverse engineering over the traditional destructive electron microscopy and ion milling techniques.

EIGER: Next generation single photon counting detector for X-ray applications,
September 2011, Nuclear Instruments and Methods in Physics Research Section A Accelerators Spectrometers Detectors and Associated Equipment 650(1):79-83
DOI: 10.1016/j.nima.2010.12.005
Roberto Dinapoli, Anna Bergamaschi, Beat Henrich, et al.
EIGER is an advanced family of single photon counting hybrid pixel detectors, primarily aimed at diffraction experiments at synchrotrons. Optimization of maximal functionality and minimal pixel size (using a 0.25μm process and conserving the radiation tolerant design) has resulted in 75×75μm2 pixels. Every pixel comprises a preamplifier, shaper, discriminator (with a 6 bit DAC for threshold trimming), a configurable 4/8/12 bit counter with double buffering for simultaneous read/write, as well as readout, control and test circuitry.  An array of 256×256 pixels fits on a ∼2×2cm2 chip and a sensor of ∼8×4cm2 will be equipped with eight readout chips to form a module containing 0.5Mpixel. Several modules can then be tiled to form larger area detectors. Detectors up to 4×8 modules (16Mpixel) are planned.  The detector can achieve frame rates of up to ∼24kHz thanks to its highly parallel readout architecture. Several tests were done both with a lab X-ray source and at Swiss Light Source (SLS) beamlines. These tests demonstrate the full functionality of the chip and provide a first assessment of its performance. High resolution X-ray images and “high speed movies” were produced, even without threshold trimming, at the target system frame rates (up to ∼24kHz in 4 bit mode).
MÖNCH, a small pitch, integrating hybrid pixel detector for X-ray applicationsMay 2014, Journal of Instrumentation 9(05):C05015
MÖNCH is a novel hybrid silicon pixel detector where CI (charge integration) is combined with a challengingly small pixel size of 25× 25 μm². CI enables the detector to process several incoming photon simultaneously in XFEL applications. Moreover, due to the small pixel size, the charge produced by an impinging photon is often shared. In low flux experiments the analog information provided by single photons can be used either to obtain spectral information or to improve the position resolution by interpolation. Possible applications are resonant and non-resonant inelastic X-ray scattering or X-ray tomography with X-ray tubes. Two prototype ASICs were designed in UMC 110 nm technology.  The paper presents the MÖNCH project and first results obtained with the MÖNCH02 prototype.
Application of the DRS chip for fast waveform digitizing

November 2010, Nuclear Instruments and Methods in Physics Research Section A Accelerators Spectrometers Detectors and Associated Equipment 623(1)
Stefan Ritt, Roberto Dinapoli, Ueli Hartmann

DRS4, is switched capacitor arrays (SCA) produced in a radiation hard 0.25 µm CMOS process, and is capable of digitizing 9 differential input channels at sampling rates of up to 6 Giga-samples per second (GSPS) with an analogue bandwidth of 950 MHz (-3 dB). The channel depth can be configured between 1024 and 8192 cells, and the signal-to-noise ratio allows a resolution equivalent to more than 11 bits. Using an interleaved sampling technique, sampling rates up to 48 GSPS are possible. The high bandwidth, low power consumption and short readout time make this chip attractive for many experiments, replacing traditional ADCs and TDCs. This includes time-of-flight detectors, cosmic gamma ray observatories, PET scanners and industrial applications.

Towards MYTHEN 3: Characterization of prototype chips
November 2018,Nuclear Instruments and Methods in Physics Research Section A Accelerators Spectrometers Detectors and Associated Equipment 936
MYTHEN 3 is a new single-photon-counting readout chip being developed by the SLS detector group in 110 nm UMC technology. It will equip a 60 k-channel, 50 μm pitch microstrip detector optimized for powder diffraction experiments. Every readout channel features an amplifier and a shaper with variable gain and shaping time. The shaper output is fed to three independent discriminators, each one having a dedicated threshold, trim bit set and enable signal. The outputs of the three discriminators are processed by the counting logic section which, according to the mode of operation selected, generates the hits for the three following 24-bit counters. Several operation modes are foreseen: dual polarity, energy-windowing, count rate improvement, charge sharing suppression and pump with multiple probe time slots. The first 64-channel prototype has been tested in the lab, with fluorescence X-rays and with a synchrotron beam to characterize its noise and count rate capability. Based on the results obtained from the first chip a second 64-channel prototype has been developed and sent to production. The paper presents the architecture of the chip and the characterization results of the first chip.

Roberto Dinapoli is inventor in several PSI  patents.